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CV R&D manager, EDA software engineering | |
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| I've been managing startup R&D teams for about 8 years,, motivated by technical challenges as well as a very creative environement. I'm looking for similar responsibilities, inside a startup or bigger company, still aiming to demonstrate my technical and management skills and experiences. | |
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PROFESSIONAL EXPERIENCE
2005 - R&D Manager, DeFacTo Technologies, Moirans Office, France, DFT at RTL level.
2003 - Sr. Engineer, Kimotion Technologies, Swizerland Office, EDA tools development , Analog Synthesis , P&R (prototyped an analog router)
2003 - Site Manager, Cadence Design System, Inc., Voiron Office, Site Manager role (team of 14 R&D people) added to engineering responsibilities.
2002 - Sr. Engineering Manager , Cadence Design Systems, Inc., Voiron Office – France (Simplex Inc. acquired), EDA tools development, MS/RF designer oriented.
2000 - R&D Manager, Simplex Inc., Voiron Office – France (Snaketech S.A. acquired), EDA tools development, MS/RF designer oriented (Parasitic Extraction & Analysis for Substrate & Interconnects).
1998 - Software Engineer, Snaketech S.A., Voiron - France: EDA tools development for RF designers (Parasitic Extraction & Analysis for Substrate).
1995 - Teaching & Research, LIRSIA Lab., Université de Bourgogne - France.
SKILLS/EDUCATION
R&D team Management
C, C++, Java,Perl, GUI, RTL notions (VHDL Verilog), DataStructures, Databases …
UML, UNIX dev. tools (gnu tools, xemacs, makefile, cvs, Rational tools …)
1995-1998 - Doctorat (Phd) in Computer science (26 Feb. 1998), Université de Bourgogne - France.
Title : « SCORE(FD/B) System based on COnstraints REparation, Finite Domain / Boolean - Applications».
Lab. : LIRSIA (Laboratoire Informatique de Recherche sur les Systèmes Intelligents et leurs Applications).
1993-1995 - Maitrise and DEA (Master of science and post graduate diploma in preparation for doctoral studies) in Computer Science, Université de Bourgogne – France.
1990-1992 - DUT (a two year course with technical specialization) in Computer Science, Université de Bourgogne – France.
1990 - Baccalauréat (High-School diploma, in Science, Dijon – France.
ARTICLES / PATENTS
2002 - Improved Substrate Noise Modeling with Improved Surface Gridding Technique U.S. Patent No. 6,438,733 August 2002.
1997 - Validation of FPGA’s logic functions design using a constraint programming language SCORE(FD/B) ICAIA’97 – February 1997 – Cairo, Egypt.
1996 - Write shorter to solve faster! ASIAN’96 Workshop – Constraints and constraint programming – December 1996 – Singapore.
1995 - SCORE(FD/B) An Efficient Complete Local-Based Search Method for Satisfiability Problems CP’95 Workshop – Studying Really Hard Problems – September 1995 – Cassis, France.
MISCELANEOUS
Languages : French (mother tong), English (fluent).
Activities : Books, Movies, Music, Skiing, Horse riding.
Driving licenses : Car, Motorcycle. | |
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| Recherche d'Emploi : | Recherche Passive d'emploi | |
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| Formation : | | |
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| Expérience : | >10 ans | |
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| Résidence : | Isère (38) | |
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| Préférences Géographiques : |
Isère (38) | |
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| Mots Clefs : | R&D team Management
C, C++, Java,Perl, GUI, RTL notions VHDL , Verilog, DataStructures, Databases
UML, UNIX tools, gnu tools, xemacs, makefile, cvs, Rational tools | |
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